This invention relates in general to processing within a multiprocessor computer system, and more particularly, to page table invalidation, page clearing and storage key handling within a multiprocessor computer system.
Various existing computing environments, such as those based, for instance, on the z/Architecture®, offered by International Business Machines Corporation, Armonk, N.Y., employ storage keys to facilitate processing within a computing environment. As one example, a storage key is associated with each block of real storage (also referred to as a frame). One function of a storage key is to provide a reliability mechanism that is used to segregate blocks of storage, ensuring that programs executing in one key do not improperly store into or, subject to a control in the key, fetch from blocks having a different key. A further function is to provide indications to an operating system as to which blocks have been referenced and changed, thus allowing the operating system to determine which blocks may need to be written to auxiliary storage.
A storage key is set, in one example, by a Set Storage Key Extended (SSKE) instruction, offered by International Business Machines Corporation, Armonk, N.Y. This instruction sets all of the constituent components of the key simultaneously.
To improve system performance, a processor may buffer a subset of the storage keys in a local (processor-specific) area. However, when a storage key is changed, then all processors in a multiprocessor coherence domain are to effectively observe the change coherently, such that stale local copies of the key are discarded or updated to the changed value. In one example, the Set Storage Key Extended instruction requires the system to be serialized to ensure that all CPUs observe the changes to the key. This serialization may be performed in hardware using a fast quiesce mechanism, as an example.
When executing the Set Storage Key Extended operation with the fast quiesce mechanism, all processors within the same domain as the requestor may be quiesced. That is, each is to reach an interruptible point to honor the fast quiesce request. When honoring the request, the processors purge any locally buffered copies of the key and all processors in that zone, besides the one that initiated the quiesce, resume execution but are prevented from accessing the relevant frame, while the operation is being performed. From an implementation perspective, the system quiesce is used to ensure that any local copy of the key is not out of date with respect to the system key and prevent inconsistent views of the key during the operation.
However, there is a large overhead associated with the hardware quiesce mechanism used to implement the Set Storage Key Extended instruction. For instance, only a limited number of quiesce operations (e.g., one in many environments) can be performed in the system at a time and the quiesce operations must be serialized in the storage controller hardware. This results in a large system impact for each quiesce, and therefore, for each update of the storage keys.
Similarly, the life cycle of a virtual page will typically include execution of an Invalidate Page Table Entry instruction to invalidate the associated page table entry for de-allocating the page from use. The Invalidate Page Table Entry instruction also typically has a large overhead associated with a required quiesce mechanism used to purge any cached copies of stale DAT translation results from local processor caches in the multiprocessor system.
In addition, the deallocation or reallocation of a virtual page frame to a new user conventionally has long latencies associated with one or more processors first clearing, and then subsequently fetching cleared lines of data from central storage. For example, for a 4k-byte page frame and a 256-byte data line size, clearing the page data may consume 16 line stores, while fetching the cleared lines may additionally require 16 central storage fetches.